FPGA-Based Implementation of SCADA System for Fuel Management

Authors

  • Shoaib Ahmed Oil & Gas Regulatory Authority (OGRA), Islamabad, Pakistan Author
  • Aneela Pathan Department of Electronics, University of Larkana, Larkana, Pakistan Author
  • Fareesa Khan Sohu Department of Electronics, University of Larkana, Larkana, Pakistan Author
  • Syed Haseeb Shah Department of Electronics, University of Larkana, Larkana, Pakistan Author
  • Danish Munir Arain Software Engineer, Ceptua IT Inc., Birmingham, USA Author
  • Rizwan Aziz Mangi Department of Electronics, University of Larkana, Larkana, Pakistan Author

DOI:

https://doi.org/10.52584/QRJ.2102.03

Keywords:

Automation, FPGA, SCADA, SDK, Xilinx

Abstract

With the emergence of Digital Processors and Logic Design technologies, like FPGAs, the trend of using IC-based plug-and-play modules has been minimized. The focus is commercial off-shelf designing and developing modules and sub-modules on new FPGA technology. Some of the critical factors that make FPGA more suitable include enormous computational power, capabilities to perform logic operations, high-speed clocks, fast memory, and various built-in primitives for computation-intensive arithmetic operations. FPGA becomes suitable for implementing data capturing and processing systems with these characteristics. This paper is about designing and developing an FPGA-based Supervisory Control and Data Acquisition (SCADA) System to monitor and control the fuel level transition between two tanks that generally are designed using PLC. PLC-based SCADA systems are easy to implement, but when
discussing performance, PLC cannot replace FPGA. The FPGA chosen is Spartan-3 due to its low cost and meeting the industrial temperature needs. At the same time, it may be translated into any advanced FPGA, producing fewer sources and power consumption benefits. The simulator is Xilinx 14.7 ISE, along with SDK. The implemented system provides the inherent amenities of SCADA along with the benefits of high speed, more accuracy, reduced and predictable delay, and a purely digitized system facilitated by the FPGA.

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Published

2023-12-29